To maintain a high breakdown voltage, vertical high-breakdown-voltage semiconductor devices, such as power MOSFETs and power IGBTs, have a breakdown voltage maintaining structure in a peripheral portion of a semiconductor substrate. Various types of breakdown voltage maintaining structures are available, such as a field plate structure, a mesa structure, a guard ring structure, a multi-step field plate structure, and a RESURF (reduced surface field), which are all well known.
The guard ring structure will be described below in reference to FIGS. 4A and 4B. FIG. 4A is a plan view illustrating the configuration of an important part of a vertical power MOSFET having a conventional guard ring structure. FIG. 4B is an enlarged sectional view of section G of FIG. 4A. The active region or portion 26 of the MOSFET includes p-well regions 2 formed as surface layers in an n-type semiconductor substrate 1, and n-type source regions 3 formed as surface layers in each p-well region 2. Each gate electrode 5 is formed over portions, interposed between a portion of the semiconductor substrate 1 and the n-type source regions 3 in the p-well regions 2, with a gate oxide film 4 interposed in between. An interlayer insulating film 6 is formed on and over each gate electrode 5, and a source electrode 7 is formed on and over the n-type source regions 3 and the interlayer insulating films 6. An n-type drain region (not shown) is formed on the back surface side of the n-type semiconductor substrate 1 and a drain electrode (not shown) is formed on the n-type drain region.
The breakdown voltage maintaining structure is formed in a peripheral portion, which is located around the active portion 26. Loop-shaped p-type guard rings 51 are formed as surface layers in the n-type semiconductor substrate 1 at the same impurity concentration and with the same diffusion depth as the p-well regions 2, and spaced from the outermost p-well region 2. An insulating film 54 is formed on the p-type guard rings 51, and a loop-shaped metal film 55 (Al—Si films) is formed on the insulating film 54 connected to every other p-type guard ring 51. A p-type contact region 53 is formed in every other p-type guard ring 51 at the corners (i.e., at the positions corresponding to the chip corners) and is connected to the corresponding metal film 55 through a contact hole 56. A p-type stopper region 57 is formed as a surface layer of the n-type semiconductor substrate 1 and extending fully around adjacent to the outer periphery of the chip. A p-type contact region 53 is formed as a surface layer of the p-type stopper region 57, and is connected to a metal film 55 through a contact hole 56 formed through the insulating film 54. The active portion 26 is located at the center of the chip and the breakdown voltage maintaining structure is located around the active portion 26. The breakdown voltage maintaining structure is composed of the p-type guard ring forming portion 58, which is located around the active portion 26 and an end structure. The p-type contact regions 53 and the contact holes 56 are formed at the corners of the breakdown voltage maintaining structure, that is, at the positions corresponding to the chip corners. In certain cases, the p-type contact regions 53 and the contact holes 56 are formed completely around in the breakdown voltage maintaining structure.
Referring to FIG. 5, which is an enlarged version of section E of FIG. 4B illustrating an equipotential line diagram of the guard ring forming portion 58, equipotential lines 59 that pass between the metal films 55 and extend outwardly are dense in a region F, which is near a curved portion 52 on the inside p-type guard ring 51. The electric field strength is high near the curved portion 52. The guard ring forming portion 58 is designed so that the peak values of the electric field strength of the respective p-type guard rings 51 become approximately identical. With the conventional p-type guard rings 51, the p-type guard ring forming portion 58 is elongated to decrease the peak values of electric field strength to, for example, about 2×105 V/cm or less.
JP-A-8-306937 discloses a breakdown voltage maintaining structure, which is a combination of a low-impurity-concentration RESURF structure and a guard ring structure, that does not use a field plate whose conductivity decreases at low temperature. As shown in FIG. 4A, as the p-type guard ring forming portion 58 becomes longer, the chip area increases, increasing the manufacturing cost. To avoid this problem, a RESURF structure, for example, is employed.
FIG. 6 is a sectional view of an important part of a vertical power MOSFET having a RESURF structure. Here, the active portion 26 is the same as the one shown in FIG. 4B. A p-type region 61 (RESURF region) is formed as a surface layer in an n-type semiconductor substrate 1 and connected to an outermost p-well region 2, and a field plate 66 is formed over the p-type region 61 with an insulating film 64 interposed in between. The field plate 66 is formed by extending a source electrode 7. A breakdown voltage maintaining structure, which is composed of the p-type region 61 and an end structure, is formed around the active portion 26. A p-type stopper region 62 is formed completely around the outer periphery of the chip. The impurity concentration of the p-type stopper region 62 is low because it is formed at the same time as the p-type region 61. Therefore, a high-impurity-concentration p-type contact region 63 is formed as a surface layer in the p-type stopper region 62 fully around the periphery of the chip. Part of the insulating film 64 is formed on the p-type contact region 63. The p-type contact region 63 is connected to a metal film 67 through a contact aperture 65 formed through the insulating film 64 fully around the periphery of the chip.
In this RESURF structure, the expanse of a depletion layer is susceptible to external charge because the impurity concentration of the p-type region 61 is as low as that of the n-type semiconductor substrate 1. To avoid this problem, it is necessary to form a thick insulating film 64 on the p-type region 61. Forming a thick insulating film 64 increases the manufacturing time and cost.
JP-A-8-306937 mentioned above does not disclose extending the metal film (Al electrode) formed on a guard ring over to the immediate inside guard ring. In this guard ring structure, although the guard rings have uniform electric field strength, the electric field strength itself is high, necessitating a long guard ring forming portion.
Accordingly, there remains a need for a semiconductor device having a small chip area and less susceptible to external charge. The present invention addresses this need.